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CSM-0 & MiniDaq Code Contains

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CSM-0 VerilogHDL Code Listing

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CSM-0 VerilogHDL Code

VerilogHDL Code used in the CSM-0 Rev B

A version of the code for the CSM-0. This code is not kept up to date so it is here for reference only. If exact code is desired for the currently produced CSM-0, contact J. Chapman at umjwc@umich.edu

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	Type	Title	Owner	Edited	Size	Actions
		VerilogHDL for Multiplexer XC4044XLA-7 The CSM-0 Multiplexer chip VerilogHDL Specification	umjwc	08/13/03	71 KB	Delete Document Permissions View Document & Properties Create Scan Cover Sheet
		VerilogHDL for Serial to Parallel XC4013XLA-7 Serial to parallel chip Verilog Code for CSM-0	umjwc	08/13/03	9 KB	Delete Document Permissions View Document & Properties Create Scan Cover Sheet
		VerilogHDL for the tomographic CSM-0 One module is changed from the standard.	umjwc	10/08/00	31 KB	Delete Document Permissions View Document & Properties Create Scan Cover Sheet
		VerilogHDL for trigger, timing, and control emulator, XC4013XLA-7 The TTCem chip on the CSM-0 Verilog code	umjwc	08/13/03	25 KB	Delete Document Permissions View Document & Properties Create Scan Cover Sheet

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CSM-0 VerilogHDL Code Listing

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